Cellular SOC Design Verification Engineer - Entry Level

Job Description

As a Cellular SOC Design Verification Engineer - Entry Level, you will be a key contributor to the verification effort for a series of complex SOCs powering Apple’s Cellular solutions. In this role, you will integrate sophisticated IP-level DV environments and design best-in-class UVM-based test benches. You will develop effective coverage-driven and directed test suites, deploying advanced tools and methodologies to ensure our chips are right the first time. This position involves collaboration with various product development groups across Apple, pushing industry boundaries and enhancing the cellular systems that elevate the product experience for customers around the globe.

Requirements

• MS in Electrical Engineering or Computer Science. Coursework in Digital Design, Computer Architecture, Object-Oriented Programming, Networking Protocol.
• Programming experience in SystemVerilog, Python, C++, or Java.
• Great teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges.
• BS and a minimum of 3 years of relevant industry experience is required.

Responsibilities

• Contribute to the verification effort of a set of complex SOCs delivering the Cellular solution.
• Integrate multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM based test bench, implement effective coverage-driven and directed test suites, and deploy new tools and methodologies to deliver chips that are right-first-time.
• Collaborate with other product development groups across Apple to push the industry boundaries of what cellular systems can do and improve the product experience for customers worldwide.

Benefits

• Offers comprehensive medical and dental coverage, retirement benefits, discounted products, free services, stock programs, bonuses, relocation assistance, and educational reimbursement.