Senior Power Architecture and Optimization Engineer

Job Description

NVIDIA is seeking a Senior Power Architecture and Optimization Engineer to drive ASIC teams to improve power efficiency of GPUs and Tegra SOCs.

Requirements

• MS or PhD in related fields
• Strong understanding of energy consumption, estimation, data movement, and low power design
• Familiarity with Verilog and ASIC design principles
• Good verbal/written English and interpersonal skills
• Strong coding/automation skills in Python, Perl, and C++

Responsibilities

• Develop techniques to model, analyze, and reduce power consumption of NVIDIA GPUs
• Collaborate with cross-functional teams to implement power analysis and reduction techniques
• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools
• Automate flows and define new flows to fast-track power anomaly detection

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching