Senior Photonic Layout Design Engineer

Job Description

NVIDIA is seeking a Senior Photonic Layout Design Engineer to work on high-speed mixed-signal & Silicon Photonic Designs and join a diverse and innovative team.

Requirements

• BS in Electrical Engineering or equivalent experience
• At least 5+ years of hands-on layout design experience
• Deep understanding of analog circuit layout and Silicon Photonic concepts in CMOS and SiPhtechnologies
• Experience with Cadence custom circuit design tools
• Proficiency in scripting languages like perl, python, skill etc.
• Knowledge of DRC and LVS checking flows

Responsibilities

• Conduct chip layout circuit design, circuit checking, and device evaluation and characterization
• Perform physical layout for mixed-signal functions in state-of-the-art sub-micron CMOS technologies
• Customize designs for integration in SiPh and other SERDES products
• Job duties will include floor planning, custom layout and verifying against design rules and schematics
• Fill, post-processing, DRC mitigation, and foundry interactions

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching