Senior RTL Analysis Methodology Engineer

Job Description

NVIDIA is seeking a CAD Methodology Engineer to join their team and contribute to the development of chip design methodologies.

Requirements

• BS or MS in Electrical Engineering, Computer Engineering, or related fields
• 6+ years of experience in RTL analysis, RTL design, and verification
• Proficiency in scripting languages like Perl, Python, Tcl and Verilog SystemVerilog HDL
• Experience with static sign-off technologies CDC, RDC, and Formal
• Strong problem-solving and debugging skills
• Interpersonal and collaboration skills

Responsibilities

• Developing flows, methodology, and application support for Clock Domain Crossing(CDC) and Reset Domain Crossing(RDC)
• Evaluating, deploying, and supporting EDA tools and methodologies for RTL analysis
• Acting as an in-house EDA tools specialist
• Analyzing issues, building solutions, providing test cases to EDA vendors, and inventing new methodologies to improve coverage and efficiency
• Writing technical documents, training internal users, setting up and maintaining flow regressions and QA

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching