SoC Physical Design Engineer, PnR

Job Description

Join Apple in a visible role directly responsible for the physical implementation of design partition(s) for a highly complex SOC utilizing innovative process technology.

Requirements

• Minimum BS in relevant field
• Basic understanding of logic gates
• Experience with Verilog, VHDL, Python, Perl, TCL, and/or SPICE

Responsibilities

• Collaborate with architecture, CAD, timing, and logic design teams
• Complete netlist to GDS2 implementation for partition(s)
• Perform timing, physical, and electrical verification
• Identify and resolve design and flow issues