SerDes Micro Architect

Job Description

Seeking a self-motivated SERDES Micro Architect to drive the definition of next-generation IPs for Apple silicon.

Requirements

• BS degree in technical discipline with minimum 3 years of relevant experience
• Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks
• Deep understanding of adaptation and optimization algorithms
• Proficiency in equalizers, timing recovery, and system identification
• Familiarity with mixed-signal modeling in Python/MATLAB/C/C++
• Experience in system design and performance tradeoff
• Familiarity with simulation tools for analog, digital, and/or mixed-signal circuits

Responsibilities

• Define the Micro Architecture of analog mixed-signal IPs with emphasis on SERDES design
• Review firmware code, analog and digital circuits to verify design performance
• Work with silicon evaluation and design verification teams to define expected behavior
• Lead the debug effort in system bring up and factory test
• Work with signal integrity engineers to determine system requirements