SoC DFT Engineer

Job Description

As a DFT engineer, you will be involved with the complete DFT solution for a design project, spanning all aspects of semiconductor design.

Requirements

• Minimum of BS + 3 years relevant industry experience
• Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST
• Experience developing DFT specifications and driving DFT architecture and methods for designs
• Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools
• Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues

Responsibilities

• Developing and implementing DFT architecture
• Implementing DFT infrastructure
• Working with the DV team to verify DFT implementations and implement ECOs
• Generating structural test vectors and analyzing and improving coverage
• Working with designers on STA, physical, power, and logical issues
• Working with test engineers to bring up test vectors on silicon
• Running schedules and supporting multi-functional engineering efforts