ASIC Design Efficiency Engineer - New College Grad 2025

Job Description

NVIDIA is seeking an ASIC Design Efficiency Engineer to work on hardware accelerators and processors for mobile, embedded, and datacenter platforms.

Requirements

• Pursuing Bachelors or Masters Degree in EE or CE (or equivalent experience)
• Proficiency in SystemVerilog or similar HDL
• Solid understanding of logic design and computer architecture
• Strong interpersonal skills and ability to work in a diverse team

Responsibilities

• Develop innovative HW, GPU, and system designs to improve performance and efficiency
• Develop methodology and infrastructure for Performance, Power, and Area (PPA) improvements
• Deliver high-performance, area, and power-efficient RTL designs
• Collaborate with cross-functional teams to create top-performing GPUs

Benefits

• Multiple relocation packages
• Two weeklong shutdowns (mid-summer and year-end) in the US (in addition to PTO)
• 8-week parental leave
• 9 Employee Resource Groups
• Annual bonus offering
• Flexible work arrangements
• Up to 6% 401K matching